EPYC Genoa-X With Zen 4 & 3D-V-Cache in 1H 2023, Genoa, Bergamo & Turin With SP6 Support

An alleged roadmap of AMD’s next-gen EPYC Server CPUs and Platform has been leaked by AdoredTV. The roadmap lists the upcoming server CPUs Genoa, Bergamo, Genoa-X and Turin, along with a new platform known as SP6.

AMD’s Alleged EPYC Server CPU & Platform Roadmap Spills the Beans on Genoa-X, Turin, and SP6

We can’t confirm the validity of the roadmap slides, so this post should be treated as a rumor, but most of the details have also been reported by other leakers before, so it’s worth sharing. First, there is the EPYC Server CPU roadmap for 2021-2023. The roadmap not only lists EPYC server chips, but also the respective platforms they target. AMD recently launched its latest SP3 platform chips, the EPYC 7003X ‘Milan-X’, which are based on the Zen 3 core architecture with 3D V-Cache.

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AMD EPYC Server CPU and Platform roadmap has been leaked. (Image Credit: Adored TV)

EPYC Zen 4(C) extended with Genoa, Bergamo and Genoa-X

Moving on, AMD plans to focus on the SP5 platform that is based on the LGA 6096 socket and will include at least two generations of processor lineups, Genoa and Bergamo. The AMD EPYC Genoa CPUs will feature up to 96 Zen 4 cores in 200-400W SKUs, while Bergamo will have a total of 128 Zen 4 cores in 320-400W SKUs. The SP5 platform is a high-performance design that provides both 1P and 2P support, up to 12-channel DDR5 memory, up to 160 PCIe Gen 5.0 lanes and 64 lanes for CXL V1.1+, and up to 12 PCIe Gen 3.0 lanes .

The same roadmap also mentions Genoa-X, something that was also mentioned yesterday by Moore’s Law is Dead in its video. The Genoa-X CPUs are expected to enter production in late Q3/early Q1 2023 and launch around mid-2023. They will have a similar design methodology to the Milan-X chips with 3D V-Cache as ‘Large L3’ is a highlighted feature of the lineup. So in total, SP5 will end up with three EPYC families.

What is SP6? A cost-optimized version of SP5 for edge servers

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At the same time, AMD is expected to introduce a new platform known as SP6, which will be a more TCO-optimized offering for low-end servers. It will be a 1P solution with 6-channel memory, 96 PCIe Gen 5.0 lanes, 48 ​​lanes for CXL V1.1+ and 8 PCIe Gen 3.0 lanes. The platform will feature Zen 4 EPYC CPUs, but only the entry-level solutions with up to 32 Zen 4 and up to 64 Zen 4C cores. Their TDPs will range between 70-225W. So it seems that the SP6 platform is designed to support the entry-level variants of EPYC Genoa, Bergamo and even Turin CPUs. It will focus on Density & Perf/Watt optimizations for leadership in the Edge / Telecommunications segment.

The roadmap confirms next-gen products such as EPYC Genoa-X, Turin for SP5 and SP6 platforms. (Image Credit: Adored TV)

Discovered in documentation by @Olrak (via Anandtech Forums), it appears that the SP6 socket is very similar to the existing SP3 socket, so the packaging layout of the SP6 chips will also be similar compared to existing EPYC CPUs. They won’t be using the full 12 dice layout like Bergamo does, preferring to stick with an 8 die layout as the existing parts. While the socket looks the same, the internal pin layout has been changed to LGA 4844 vs LGA 4096 (on SP3 sockets). Other dimensions are the same at 58.5 x 75.4.

Most of these products are expected to hit the market in the second half of 2022 and the first half of 2024. We can expect a formal announcement of the new roadmap by AMD soon and a possible unveiling at the Computex 2022 event scheduled in a few weeks.

AMD EPYC CPU Families:

Last name AMD EPYC Naples AMD EPYC Rome AMD EPYC Milan AMD EPYC Milan-X AMD EPYC Genoa AMD EPYC Bergamo AMD EPYC Turin AMD EPYC Venice
Family branding EPYC 7001 EPYC 7002 EPYC 7003 EPYC 7003X? EPYC 7004? EPYC7005? EPYC 7006? EPYC 7007?
Family Launch 2017 2019 2021 2022 2022 2023 2024-2025? 2025+
CPU architecture Zen 1 Zen 2 Zen 3 Zen 3 Zen 4 Zen 4C Zen 5 Zen6?
Process node 14nm GloFo 7nm TSMC 7nm TSMC 7nm TSMC 5nm TSMC 5nm TSMC 3nm TSMC? To be determined
Platform Name: SP3 SP3 SP3 SP3 SP5/SP6 SP5/SP6 SP5/SP6 To be determined
Wall outlet LGA 4094 LGA 4094 LGA 4094 LGA 4094 LGA6096 (SP5)
LGA XXXX (SP6)
LGA6096 (SP5)
LGA XXXX (SP6)
LGA6096 (SP5)
LGA XXXX (SP6)
To be determined
Max number of cores 32 64 64 64 96 128 256 384?
max. number of threads 64 128 128 128 192 256 512 768?
Max L3 cache 64MB 256MB 256MB 768MB? 384MB? To be determined To be determined To be determined
Chiplet design 4 CCDs (2 CCXs per CCD) 8 CCDs (2 CCXs per CCD) + 1 IOD 8 CCDs (1 CCX per CCD) + 1 IOD 8 CCDs with 3D V-Cache (1 CCX per CCD) + 1 IOD 12 CCDs (1 CCX per CCD) + 1 IOD 12 CCDs (1 CCX per CCD) + 1 IOD To be determined To be determined
Memory support DDR4-2666 DDR4-3200 DDR4-3200 DDR4-3200 DDR5-5200 DDR5-5600? DDR5-6000? To be determined
Memory channels 8 channels 8 channels 8 channels 8 channels 12 channels (SP5)
6-channel (SP6)
12 channels (SP5)
6-channel (SP6)
12 channels (SP5)
6-channel (SP6)
To be determined
PCIe Gen Support 64 generation 3 128 generation 4 128 generation 4 128 generation 4 160 generation 5 (SP5)
96 Gen 5 (SP6)
160 generation 5 (SP5)
96 Gen 5 (SP6)
To be determined To be determined
TDP range 200W 280W 280W 280W 200W (cTDP 400W) SP5
70-225W SP6
320W (cTDP 400W) SP5
70-225W SP6
480W (cTDP 600W) To be determined

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